There has been known a comparator system including a comparator which has a pair of input nodes configured to receive input signals via capacitors and an output node configured to output an output signal indicating a voltage difference of the input signals. A first control circuit is configured to set a common voltage at the pair of input nodes. A second control circuit is configured to set an amount of load to be connected to the output node. A third control circuit is configured to supply a pair of input terminals with a first voltage and a second voltage, respectively, between which there is a certain voltage difference, in a correction period for correcting a threshold of the comparator. Here, the certain voltage difference corresponds to how much a threshold of a reference comparator changes upon connection of a predetermined amount of load to an output node of the reference comparator. In the correction period, with the predetermined amount of load connected to the output node, the first control circuit changes the common voltage until the logic of the output signal is inverted. Then, in a normal operation period following the correction period, the first control circuit uses the common voltage at which the logic of the output signal is inverted.
When the predetermined amount of load is connected to the output node of the comparator in order to correct the threshold of the comparator, the operating speed of the comparator is lowered.
The following is reference document:    [Document 1] Japanese Laid-open Patent Publication No. 2013-70156.